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Espressif Systems /ESP32-S2 /RTC_I2C /SCL_START_PERIOD

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Interpret as SCL_START_PERIOD

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31282724232019161512118743000000000000000000000000000000000000000000SCL_START_PERIOD

Description

Configure the delay between the SDA and SCL negative edge for a start condition

Fields

SCL_START_PERIOD

Number of clock cycles to wait after generating a start condition.

Links

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Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data